Systems and methods for creating in a transmitter a stream of symbol frames configured for efficient processing in a receiver

ABSTRACT

A system and method of creating frames comprised of blocks, where each block comprises data symbols corresponding to a higher order quadrature modulation format and support symbols corresponding to a lower order modulation format. One or more of the blocks can further comprise markers comprising distinct symbol patterns. The markers can mark the start of each frame and/or another location in the frame. The support symbols can be in a common location in each block.

RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No.16/983,226, filed 3 Aug. 2020, which claims priority from U.S. patentapplication Ser. No. 16/132,325, filed 14 Sep. 2018, which areincorporated herein in their entirety.

BACKGROUND

The demand for high-throughput data transmission is ever increasing. Forexample, the need has been growing in the industry to transmitincreasingly larger quantities of data at increasingly faster speeds.This has given rise to the need to improve the efficiency of processboth in the transmitter and the receiver. Embodiments of the presentinvention organize symbols representing multiple bits into parallelsymbol blocks, which form frames for transmission to a receiver.Attributes of the frames can provide processing advantages.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates an example of a telecommunications transmitteraccording to some embodiments of the invention.

FIG. 2 illustrates an example of streams of frames each comprisingsymbol blocks according to some embodiments of the invention.

FIG. 3 shows an example of a framer according to some embodiments of theinvention.

FIG. 4 illustrates an example of a method by which a framer can operateaccording to some embodiments of the invention.

FIGS. 5A-5D show examples relating to the method of FIG. 4 according tosome embodiments of the invention.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

This specification describes exemplary embodiments and applications ofvarious embodiments of the invention. The invention, however, is notlimited to the exemplary embodiments and applications or to the mannerin which the exemplary embodiments and applications operate or aredescribed herein. Moreover, the figures may show simplified or partialviews, and the dimensions of elements in the figures may be exaggeratedor otherwise not in proportion for clarity. In addition, as the terms“on,” “attached to,” or “coupled to” are used herein, one object (e.g.,a material, a layer, a substrate, etc.) can be “on,” “attached to,” or“coupled to” another object regardless of whether the one object isdirectly on, attached, or coupled to the other object or there are oneor more intervening objects between the one object and the other object.Also, directions (e.g., above, below, top, bottom, side, up, down,under, over, upper, lower, horizontal, vertical, “x,” “y,” “z,” etc.),if provided, are relative and provided solely by way of example and forease of illustration and discussion and not by way of limitation. Inaddition, where reference is made to a list of elements (e.g., elementsa, b, c), such reference is intended to include any one of the listedelements by itself, any combination of less than all of the listedelements, and/or a combination of all of the listed elements.

As used herein, “substantially” means sufficient to work for theintended purpose. If used with respect to a numerical value or range,substantially means within ten percent. The term “ones” means more thanone.

FIG. 1 illustrates an example of a communications transmitter 100 formapping user bits into quadrature modulated symbols, organizing thesymbols into frames comprising symbol blocks, and transmitting theframes to a remote communications receiver (not shown). Although notshown, the transmitter 100 can comprise a digital signal processing(DSP) circuitry to perform various DSP operations, digital-to-analogconverters (DACs), and supporting analog circuitry (e.g., amplifiers,multiplexers, couplers, etc.) The frames cleverly organize the symbolsto facilitate speedy and efficient processing both at the transmitter100 and the receiver (not shown).

As shown, a communication or client information (e.g., a message, afile, a multi-media object, a web page, or the like) 170 to be sent to aremote receiver (not shown) is processed (represented generically bypreprocessing 102) to produce digital data in the form of bits 110 fortransmission to the remote receiver (not shown). The bits 110 aresometimes referred to herein as user bits or client bits. Thepre-processing 102 can include functions such as encoding (e.g., sourceencoding and channel encoding), encryption, and/or the like. In someembodiments, the preprocessing 102 can receive bits at its inputeliminating rather than or in addition to the client information 170.

A framer 120 can map the bits 110 into symbols and organize the symbolsinto frames each comprising multiple blocks of symbols. The framer 120can thus be understood a module of the transmitter 100 that performs bitparsing, bit-to-symbol mapping, and/or symbol reformatting using thebits output by the preprocessing 102 to generate so-called “waveformframes,” which can be actual frames of symbols to be transmitted over acommunications medium (not shown) to a receiver (not shown). The framer120 can thus be a waveform framer.

As shown, the framer 120 can produce from the bits 110 multiple streamsof frames 112 and 113 (sometimes referred to herein as “frame streams”).In the example illustrated in FIG. 1, the framer 120 produces a firstframe stream 112 and a second frame stream 113. Each of the framestreams 112 and 113 can undergo further digital and analog processing130, which can result in the first frame stream 112 being modulated ontoa first carrier signal 122 and the second frame stream 113 beingmodulated onto a second carrier signal 124. A combiner 140 can combinethe carrier signals 122 and 124 into a composite signal 132, which canbe launched by a transmission module 150 into a channel orcommunications medium (not shown) for transmission to a receiver (notshown).

The composite signal 132 can be a communications signal. For example,composite signal 132 can be a baseband communications signal or any typeof bandpass communications signal including a modulated optical signalor any other type of modulated electromagnetic signal whethertransmitted wirelessly or over a physical medium such as a fiber, acable, etc. For example, the composite signal 132 can be adual-polarization optical signal in which the carrier signals 122 and124 can be mutually orthogonal optical signals. For example, the firstcarrier signal 122 can be a horizontally polarized optical signal, andthe second carrier signal 124 can be a vertically polarized opticalsignal. The transmission module 150 can be a module comprising varioustransmitter front-end elements, e.g., an amplifier, a multiplexer, afiber pigtail, a coupler, an antenna, or the like), which can couple orlaunch the composite signal 132 into the channel or the communicationsmedium for transmission.

The framer 120 can map the bits 110 into quadrature symbols. As isknown, a quadrature symbol comprises an in-phase (I) component and aquadrature (Q) component. As is also known, the I and Q component pairsfor each symbol can be carried on separate signals (not shown). Thus,the first stream 112 can comprise two signals (not shown): one signal(not shown) carrying the I components of the symbols, and another signal(not shown) carrying the corresponding Q components. Similarly, thesecond stream 113 can also comprise I and Q signals (not shown). Forease of illustration and discussion, however, descriptions herein aremade in reference to symbols, but it is to be understood that eachsymbol can comprise an I/Q component pair and any signal or stream ofsymbols can comprise two signals or streams one carrying the Icomponents and the other carrying the corresponding Q components of thesymbols. Thus, any stream of symbols, whether a stream of individualsymbols, a stream of symbol blocks, or a stream of frames, thoughdepicted or discussed herein in terms of a single symbol entity cancomprise two streams or signals in which one stream or signal comprisesthe I components and another stream or signal comprises the Qcomponents. In general, each symbol can comprise any number ofpredetermined components (or dimensions). For example, symbolsassociated with multi-dimensional modulation formats, whose number ofdimensions is greater than two, will have as many components as thenumber of dimensions of the underlying modulation format. As an example,while a two-dimensional modulation format can be defined in atwo-dimensional space spanned by quadrature signals (e.g., I and Q), athree-dimensional modulation format can be defined over athree-dimensional space spanned an additional dimension to I and Q,e.g., time, space, etc. However, without loss of generality, symbols aredescribed herein as multi-component (or multi-dimensional) symbolshaving two components (or dimensions), i.e., I and Q.

Many different quadrature modulation formats are known including phaseshift keying (PSK) and quadrature amplitude modulation (QAM) formats.Examples of quadrature modulation formats include QPSK, 8-PSK, 8-QAM,16-PSK, 16-QAM, 32-QAM, 64-QAM, 128-QAM, 256-QAM, and the like. Theforegoing or other known or later developed quadrature modulationformats can be utilized in embodiments of the invention. As is known,the “order” of a quadrature modulation format corresponds to the numberof different symbols in the format's symbol constellation. The smallerthe number of symbols in the constellation the lower the order, and thegreater the number of symbols in the constellation the greater theorder. Also, the greater the order, the greater the number of bits 110each symbol represents.

The transmitter 100, and hence, its DSP circuit (not shown), and hence,the framer 120 comprised by the DSP can support several predeterminedoperating modes identified by an operating mode identifier signal 114.As described herein, the term the “supported operating modes” describeseveral predetermined operating modes that a DSP of a transmittercomprising the framer 120, and hence, the framer 120 system itself, canbe configured to operate at. Similarly, the “selected operating mode” isused herein to describe the selected one of the supported operatingmodes. Each one of the supported operating modes is associated with afirst plurality of modulation formats and a second plurality ofmodulation formats to be used in generating different types of symbolsfrom bits 110, as described in greater detail herein. The term“supported modulation format(s)” is understood herein to refer to thesuperset of the modulation format(s) associated with the supportedoperating modes. The term “selected modulation format(s)” is understoodherein to correspond to the modulation format(s) associated with theselected operating mode as identified by the signal 114.

The framer 120 can be configured to map some of the bits 110 into any ofseveral supported modulation formats associated with the selectedoperating mode as identified by the signal 114. For example, in someembodiments, the framer 120 is capable of mapping some bits 110 into theselected first and second plurality of modulation formats associatedwith the operating mode as identified by the signal 114. Without loss ofgenerality and for brevity of discussion, however, each operating modeis described herein as being associated with a first modulation formatand a second modulation format. Moreover, the second modulation formatis described herein as being the same for all supported operating modes.For example, the selected first modulation format and the secondmodulation format can each be any of the QAM formats listed above. Forexample, the second modulation format can be a lower order than each ofthe supported first modulation formats. The second modulation format canbe, for example, QPSK, while each of the supported first modulationformats can be any of QAM formats with order greater than QPSK.

FIG. 2 illustrates an example of a frame stream 200 that can begenerated by the framer 120. The first frame stream 112 and/or thesecond frame stream 113 in FIG. 1 can be like frame stream 200.

As shown, the frame stream 200 can comprise frames 202 each of which cancomprise a fixed number Y of symbol blocks 210. Each symbol block 210can comprise a fixed number N of symbols (which can facilitate parallelprocessing in the transmitter 100 and/or the receiver (not shown)). Thenumbers Y and N can be constant for every supported operating mode.

As noted, a quadrature modulated symbol comprises an I/Q component pair.The stream 200 can thus comprise two similar streams of frames (notshown): one carrying the I components of each symbol, and the othercarrying the corresponding Q components of each symbol. For ease ofdiscussion and simplicity, however, the stream 200 is illustrated as asingle stream carrying symbols, but it is to be understood that eachsymbol comprises an I and a Q component.

As shown, each symbol block 210 can comprise data symbols 232, supportsymbols 230, marker symbols SOF 220 and MRK 224, and padding 234. Thedata symbols 232 can correspond to bits 110 mapped in accordance withthe selected first modulation format, and the support symbols 230 cancorrespond to others of the bits 110 mapped in accordance with thesecond modulation format.

As shown, the support symbols 230 can be in approximately the samelocation in every block 210 in a frame 202. The exact start index of thesupport symbols 230, e.g., with respect to the beginning of each block210 that contains the support symbols 230, and the number of supportsymbols 230 can be predetermined and can vary depending on the selectedoperating mode. Similarly, the exact start index of the data symbols232, e.g., with respect to the beginning of each block 210 that containsthe data symbols 232, and the number of data symbols 232 can bepredetermined and can vary depending on the selected operating mode.

Moreover, one or more of the blocks 210 in a frame 202, e.g., SOF 220and MRK 224, can include special markers comprising distinct patterns ofsymbols. It is noted that what is sometimes referred to as a unique wordin the industry is an example of such a special marker. The symbols ofthe special markers can correspond to the second modulation format or amodulation format that is different than both the first modulationformat and the second modulation format. The symbols of a special markertypically do not correspond to any of bits 110.

In the example shown in FIG. 1, the first block 210 and the X^(th) block210 in a frame 202 include such special markers. For example, the firstblock 210 can include the start-of-frame SOF 220 symbol pattern thatmarks the start of each frame 202. The X^(th) block 210 of a frame 202can include the intermediate marker MRK 224 symbol pattern, which canserve any number of purposes including marking a particular location(e.g., an approximately middle) of the frame 202. The SOFs 220 in all ofthe frames 202 in the stream 200 can be the same, and the MRKs 224 canlikewise be the same in all the frames 202 in the stream 200. The SOFs220 and MRKs 224 can, however, be different from each other. If theframer 120 produces more than one frame stream such as the first framestream 112 and second frame stream 113 shown in FIG. 1, the SOFs 220 andMRKs 224 in one stream (e.g., 112) can be different than the SOFs andMRKs in another stream (e.g., 113). Moreover, as noted, the first framestream 112 can be decomposed into a first frame stream I (not shown) anda first frame stream Q (not shown), which carry I and Q components ofrespective symbols of the first frame stream 112, respectively.Similarly, the second frame stream 113 can be decomposed into a secondframe stream I (not shown) and a second frame stream Q (not shown). Insuch cases, the SOFs 220 and MRKs 224 in each component stream (e.g., Istream of 112, Q stream of 112, I stream of 113 and Q stream of 113) canbe different from one another. Each operating mode can be associatedwith a distinct set of symbol patterns of SOFs 220 and MRKs 224. Forexample, the start index of the SOFs 220 and MRKs 224 can be the sameregardless of the selected operating mode. For example, the SOFs 220 andMRKs 224 can have a start index of one as they are located at thebeginning of each block that they are contained in. As another example,as also noted above, the location of SOFs 220 and MRKs 224 in each frame202 can be the same regardless of the selected operating mode. However,the numbers of symbols contained in the SOFs 220 and the MRKs 224associated with a given operating mode depend on that operating mode.That is, the SOFs 220 and the MRKs 224 can have a different number ofsymbols in one supported operating mode compared to another.

As shown, the last (Y^(th)) block 210 can comprise padding 234 (e.g.,padded symbols) as needed to complete the Y^(th) block 210. For eachsupported operating mode, the number of bits 110 that can be carried byeach frame 202 is a predetermined fixed value. For example, thepredetermined number of bits 110 to be carried in each frame 202 for agiven operating mode can be determined based on the number of forwarderror correction (FEC) codewords that can be fit in a frame 202. As alsonoted, the bits 110 are mapped to the data symbols 232 based on theselected first modulation format and others of the bits 110 are mappedto the support symbols 230 based on the second modulation format. For aselected operating mode as identified by the signal 114, if all theassociated predetermined number of bits 110 to be carried in each frame202 cannot be mapped to the associated predetermined number of datasymbols 232 and the associated predetermined number of support symbols230, then some bits 110 will be left unmapped. Also, due to suchmismatch, the last block (Y^(th)) 210 of each frame 202 may have somepositions left unfilled. Both the number of bits that will be leftunmapped and the number of padding bits needed to fill the unfilledpositions in the last block 210 of each frame 202 can also bepredetermined for each supported operating mode. Therefore, the unmappedbits can be first padded with a predetermined number of padding bits,e.g., randomly generated bits or bits extracted from a known sequence,and the resulting set of bits can then be mapped to data symbols basedon the selected first modulation format, and stored in the padding 234of the last block (Y^(th)) 210.

The SOF 220 can comprise a distinct pattern of symbols that can bereadily detected, e.g., via correlations, at the receiver (not shown).Hence, the SOF 220 are designed to have desirable auto- andcross-correlation properties to facilitate determining boundaries offrames at a receiver (not shown). In some embodiments, the receivermight perform differential decoding on the received samples (includingSOF 220) before initiating its search for frame boundaries to increaseresiliency of the frame boundary search process to various impairmentsand/or distortions. For example, during signal acquisition, thefrequency offset present in the signal might hinder access to absolutephase information. Since differential encoding associates transmittedbits with phase transitions rather than absolute phases, such bits canbe recovered via differential decoding at the receiver without the needfor absolute phases to have been determined. In such embodiments, theSOF 220 can be designed to have desirable auto- and cross-correlationproperties when used with and without differential decoding. Usingdifferentially decoded SOFs, a receiver can thus allow a receiver (notshown) to identify the start of frames in the received samples even whenthe transmission signal is subjected to various impairments and/ordistortions.

FIG. 3 illustrates an example configuration (labeled 300 in FIG. 3) ofthe framer 120. For ease of description, FIG. 3 is discussed asgenerating frames that correspond to the frames 202 illustrated in FIG.2. The framer 300, however, is not so limited.

As will be seen, the framer 300 can generate from the bits 110 eachblock 210 of the frames 202 shown in FIG. 2. For example, each of thefirst block through the Y, block 210 of a frame 202 can be generated ina framer output 380. For example, the symbols of a SOF 220 or MRK 224(if present) and the first group of data symbols 232 a of each block 210can be provided by a symbol generator 304 to a first region 382 of theframer output 380, the support symbols 230 of each block 210 can beprovided by the symbol generator 304 to a second region 384 of theframer output 380, and the second group of data symbols 232 b of eachblock 210 and padding 234 (if present) can be provided by the symbolgenerator 304 to a third region 386 of the framer output 380. As eachblock 210 is generated, it can be output from the framer output 380,producing the frame stream 200 illustrated in FIG. 2.

In the example shown in FIG. 3, the framer 300 can comprise a controller310, a framer input 330, a marker module 340, a data symbol mapper 350,a support symbol mapper 360, a padding module 370, and a framer output380.

The controller 310 can control operation of the framer 300. As shown,the controller 310 can comprise a tracker 312, which can keep track ofan index of the current block 210 in a frame 202 that is being created.As also shown, the controller 210 can receive the operating modeidentifier signal 114 and determine based on the signal 114 theassociated predetermined sizes and locations of each type of symbols ineach block 210 of each frame 202 to be generated in a selected operatingmode. The controller 310 can issue control signals 316 to other elementsof the framer 300 to create a current block 210 in the framer output 380in accordance with the selected first modulation format as indicated bythe signal 114 and the current block index as tracked by the tracker312.

The framer input 330 can receive bits 110 and provide sets of the bits110 to an input 352 of the data symbol mapper 350, an input 362 of thesupport symbol mapper 360, and/or an input 388 of the padding module 370in accordance with the control signals 316. In some embodiments, theframer input 330 can comprise a buffer for buffering the bits 110.

The data symbol mapper 350 can map bits 110 provided to its input 352into data symbols in accordance with the selected first modulationformat as indicated by the signal 114. An output 354 of the data symbolmapper 350 can selectively provide the data symbols to the first region382 and/or the third region 386 of the framer output 380. The controlsignals 316 can control which and how many of the bits 110 from theframer input 330 are provided to the data symbol mapper 350. The controlsignals 316 can further control the locations within the first region382 and/or the third region 386 of the framer output 380 to which thedata symbols are provided.

The support symbol mapper 360 can map bits 110 provided to its input 362into support symbols in accordance with the second modulation format. Anoutput 364 of the support symbol mapper 360 can selectively provide thesupport symbols to the second region 384 of the framer output 380. Thecontrol signals 316 can control which and how many of the bits 110 fromthe framer input 330 are provided to the support symbol mapper 360.

The marker module 340 can selectively provide the symbols of an SOF 220and/or MRK 224 over its output 344 to the first region 382 in the frameroutput 380. The marker module 340 can be capable of providing a selectedone of multiple different SOFs 220 and/or MRKs 224 based on the controlsignals 316 which are determined based on the selected operating mode asidentified by the signal 114. For example, as noted, each selectable SOF220 can comprise a different pattern of symbols. Similarly, as noted,each selectable MRK 224 can comprise a different pattern of symbols. Thecontrol signals 316 can select a particular one of the available SOFs220 and/or MRKs 224 to provide to the first region 382. The controlsignals 316 can also control the location within the framer output 380,and thus the location within the symbol block 210 being created, towhich the selected SOF 220 or MRK 224 is provided.

The padding module 370 can selectively provide padding 234 of paddedsymbols, as described previously, over its output 374 to the thirdregion 386 in the framer output 380. The control signals 316 can controlthe location within the framer output 380, and thus the location withinthe symbol block 210 being created, to which the padding 234 isprovided.

The framer output 380 can receive outputs 344, 354, 364, and 374 fromthe marker module 340, data symbol mapper 350, support symbol mapper360, and padding module 370, respectively, as discussed above. As noted,this output can comprise a newly constructed block 210. The frameroutput 380 can then output the newly constructed block 210. Thecontroller 310 can control the frame output 380 with control signals316. In some embodiments, the framer output 380 can comprise a buffer.

FIG. 4 shows an example of a method 400 for constructing a stream offrames from user bits according to some embodiments of the invention.For ease of discussion, method 400 is discussed below with respect tothe framer 300 as shown in FIG. 3 operating to produce the exemplaryframe stream 200 shown in FIG. 2, but the method 400 is not so limited.

For purposes of simplicity of explanation, the method 400 of FIG. 4 isshown and described as executing serially, but the present invention isnot limited by the illustrated order, as some aspects could occur indifferent orders and/or concurrently with other aspects from that shownand described herein. For example, 412-416 can be performedsubstantially simultaneously. Acts 432-438 can similarly be performedsubstantially simultaneously as can 452-458 and/or 472-478.

As noted, the controller 310 can comprise a tracker 312 that keeps trackof the block 210 currently being constructed. In the followingdescription of method 400, it is assumed that the tracker 312 maintainsan index that identifies the position of the current block 210 in itsframe 202. An index is but an example, and the current block 210 can betracked in other ways.

At 404, the process branches to create the type of the current block tobe created. When the block index (e.g., as kept by the tracker 312 ofthe controller 310) indicates the first block 210, the method 400branches from 404 to 430.

At 430, the controller 310 controls the framer 300 to create the firstblock 210 in a frame 202. Acts 432-438 illustrate an example.

At 432, the marker module 340 can provide a selected SOF 220 symbolpattern to a selected location in the first region 382 of the frameroutput 380. The size (e.g., in symbols) of an SOF 220 can vary with thesignal 114. The controller 310 can thus provide controls signals 316that cause the marker module 340 to provide the desired SOF 220 to thedesired location in the first region 382 of the framer output 380. Anexample of an SOF 220 symbol pattern 502 being provided from the markermodule 340 to the first region 382 is shown in FIG. 5A.

At 434, a sufficient number of bits 110 for mapping to data symbols tofill the remaining symbol positions in the first region 382 are providedfrom the frame input 330 to the data symbol mapper 350. The data symbolmapper 350 maps the bits 110 to data symbols and provides the datasymbols to the remaining positions in the first region 382.

The number of bits 110 to provide to the data symbol mapper 350 at 434can depend on the signal 114. For example, the number of bits per datasymbol, the number of symbols to provide to the first region 382, andthe number of symbol in the SOF 220 provided at 432 can depend on thesignal 114. The controller 310 can determine from the signal 114 thenumber of bits 110 to provide to the data symbol mapper 350 and thelocations in the first region 328 for the resulting data symbols. Thecontroller 310 can provide control signals 316 in accordance with theforegoing determinations. An example of data symbols 504 being providedfrom the data symbol mapper 350 to the first region 382 is shown in FIG.5A.

At 436, a sufficient number of bits 110 for mapping to support symbolsfor the second region 384 of the framer output 380 are provided from theframe input 330 to the support symbol mapper 360, which provides theresulting support symbols to the second region 384.

The number of support symbols to be provided to the second region 384can depend on the signal 114. The controller 310 can determine from thesignal 114 the number of bits 110 to provide to the support symbolmapper 360 and the locations in the second region 384 for the resultingsupport symbols. As noted, in some embodiments, the second modulationformat of the support symbols can be fixed and thus not depend on thesignal 114. The controller 310 can provide control signals 316 inaccordance with the foregoing determinations. An example of supportsymbols 506 being provided from the support symbol mapper 360 to thesecond region 384 is shown in FIG. 5A.

At 438, a sufficient number of bits 110 for mapping to data symbols forthe third region 386 are provided from the frame input 330 to the datasymbol mapper 350, which provides the resulting data symbols to thethird region 386.

As noted, the size (e.g., in number of symbols) of the third region 386can depend on the signal 114. The controller 310 can determine from thestate of the signal 114 the number of bits 110 to provide to the datasymbol mapper 360 and the locations in the third region 328 for theresulting data symbols. The controller 310 can provide control signals316 in accordance with the foregoing determinations. An example of datasymbols 508 being provided from the data symbol mapper 350 to the thirdregion 386 is shown in FIG. 5A.

At 484, the block index can be incremented. At 488, the first symbolblock 210 created in the frame output 380 can be output onto stream 200.The method 400 can then return to 404. At step 404, this time the blockindex indicates the second block 210, and the method 400 branches to410.

At 410, the controller 310 controls the framer 300 to create a regularblock (the second block 210). Acts 412-416 illustrate an example ofcreating a regular block like the second block 210.

At 412, a sufficient number of bits 110 for mapping to data symbols forthe first region 382 are provided from the frame input 330 to the datasymbol mapper 350, which provides the resulting data symbols to thefirst region 382. Act 412 can be similar to 438. For example, the numberof bits per data symbol as well as the number of symbols to be providedto the first region 382 can depend on the signal 114. The controller 310can determine from the forgoing the number of bits 110 to provide to thedata symbol mapper 350. The controller 310 can provide control signals316 in accordance with the foregoing. An example of data symbols 514being provided from the data symbol matter 350 to the first region 382is shown in FIG. 5B.

At 414, a sufficient number of bits 110 for mapping to support symbolsfor the second region 384 are provided from the frame input 330 to thesupport symbol mapper 350, which provides the resulting support symbolsto the second region 384. Act 414 can be performed in a generallysimilar manner as 436. An example of support symbols 516 being providedfrom the support symbol mapper 360 to the second region 384 is shown inFIG. 5B.

At 416, a sufficient number of bits 110 for mapping to data symbols forthe third region 386 are provided from the frame input 330 to the datasymbol mapper 360, which provides the resulting data symbols to thethird region 386. Act 416 can be performed in a generally similar manneras 438. An example of data symbols 518 being provided from the datasymbol mapper 350 to the third region 386 is shown in FIG. 5B.

At 484, the block index can be incremented. At 488, the second symbolblock 210 created in the frame output 380 can be output onto stream 200.Acts 404, 412-16, 484, and 488 can be repeated to create and output intostream 200 each block 210 from the third block to the (X−1)^(th) block210. After creating the (X−1)^(th) block 210, the block index isincremented at 484 to the (X)^(th) block 210, and at 404, the method 400branches to 450. At 450, the controller 310 controls the framer 300 tocreate the X^(th) block 210. Acts 452-458 illustrate an example ofcreating an X^(th) block 210. As shown, the X^(th) block 210 can besimilar to the first block 210.

Actions 452-458 can be performed in a similar manner to 432-438 exceptthat a MRK 224 rather than a SOF 220 is provided by the marker module340. Examples of an MRK 224 symbol pattern 522 and data symbols 524being provided from the marker module 340 and the data symbol mapper 350to the first region 382, support symbols 526 being provided from thesupport symbol mapper 360 to the second region 384, and data symbols 528being provided from the data symbol mapper 350 to the third region 386are shown in FIG. 5C.

At 484, the block index can be incremented, and at 488, the X^(th)symbol block 210 created in the frame output 380 can be output ontostream 200. Acts 404, 412-16, 484, and 488 can then be repeated tocreate and output into stream 200 each block 210 from the (X+1)^(th)block to the (Y−1)^(th) block 210. After creating the (Y−1)^(th) block210, the block index is incremented at 484 to the (Y)^(th) block 210,and at 404, the method 400 branches to 470, where the controller 310controls the framer 300 to create the Y^(th) block 210. Acts 472-478illustrate an example of creating a block like the Y^(th) block 210.

At 472, a sufficient number of bits 110 for mapping to data symbols forthe first region 382 are provided from the frame input 330 to the datasymbol mapper 360, which provides the resulting data symbols to thefirst region 382. Act 472 can be performed in a generally similar manneras 412. An example of data symbols 534 being provided from the datasymbol mapper 350 to the first region 382 is shown in FIG. 5D.

At 474, a sufficient number of bits 110 for mapping to support symbolsfor the second region 384 are provided from the frame input 330 to thesupport symbol mapper 360, which provides the resulting support symbolsto the second region 384. Act 474 can be performed in a generallysimilar manner as 436. An example of support symbols 536 being providedfrom the support symbol mapper 360 to the second region 384 is shown inFIG. 5D.

At 476, a sufficient number of bits 110 for mapping to data symbols forthe third region 386 are provided from the frame input 330 to the datasymbol mapper 350. The symbol mapper 350 maps the bits 110 to datasymbols and provides the data symbols to the corresponding positions inthe third region 386.

As noted, the number of bits per data symbol as well as the number ofsymbols to be provided to the third region 386 of the Y^(th) block andthe number of symbol positions to be occupied by data symbols depend onthe signal 114. The controller 310 can determine from the forgoing thenumber of bits 110 to provide to the data symbol mapper 350 and thelocations in the third region 386 for the resulting data symbols. Thecontroller 310 can provide control signals 316 in accordance with theforegoing determinations. An example of data symbols 538 being providedfrom the data symbol mapper 350 to the third region 386 is shown in FIG.5D.

At 478, the padding module 370 can provide padding to the third region386 as discussed above. The controller 310 can determine from the signal114 the size of the padding 234. The controller 310 can provide controlsignals 316 in accordance with the foregoing. An example of padding 540being provided from the padding module 370 to the third region 386 isshown in FIG. 5D.

At 480, the block index can be reset. At 488, the Y^(th) symbol block210 created in the frame output 380 can be output onto stream 200. Themethod 400 has now created one of the exemplary frames 202 shown in FIG.2. The method 400 can then return to 404 to continue generating frames202. The frames 202 comprising blocks 210 output at 488 can be outputfor transmission by the transmission module 150 of FIG. 1 to a remotetransmitter (not shown).

In some embodiments, a block 210 can be created substantiallysimultaneously in the framer output 380. For example, 412-416 can beperformed substantially simultaneously to create a regular block in theframer output 380. Similarly, 432-438 can be performed substantiallysimultaneously to create a first block 210 in the framer output 380, and452-458 can be performed substantially simultaneously to create anX^(th) 210 block 210 in the framer output 380. Likewise, 472-478 can beperformed substantially simultaneously to create an Y^(th) block 210 inthe framer output 380. Alternatively, some or all of the foregoing actscan be performed serially.

As noted, frame stream 200 can be an example of frame stream 112 and/orframe stream 113 of FIG. 1. In some embodiments, multiple instantiationsof the framer 300 can create multiple frame streams (e.g., 112 and 113)from multiple groups of bits 110. For example, a frame stream 200 can becreated from first bits (e.g., 110), resulting in frame stream 112, anda second frame stream 200 can be created from second bits (not shown butcan be like bits 110), resulting in frame stream 113. In otherembodiments, the framer 300 of FIG. 3 can be modified to create multipleframe streams like 200. For example, a divider (not shown) can dividethe symbols output by the data symbol mapper 350 and support symbolmapper 360 between, for example, two framer outputs (not shown but eachcan be like 380).

The blocks 210 and frames 202 illustrated in FIG. 2 are merely examples.In other embodiments, other examples of blocks and frames can becreated. For example, 410 in FIG. 4 can be an example of generating ablock comprising both data symbols and support symbols; 430 and 450 canbe examples of generating a block comprising a marker pattern of symbolsand both data symbols and support symbols; and 470 can be an example ofgenerating a block comprising both data and support symbols and padding.

The elements of FIG. 1 or 3 can be implemented in software, hardware(e.g., digital logic and/or analog circuits), and/or a combination ofthe foregoing. Any such software, for example, can reside in a digitalmemory (not shown) from which it is executed by the controller 310.Alternatively, one or more of the elements of FIG. 1 or 3 can comprise aprocessor (not shown) for executing software from a memory (not shown).

The controller 310, whether configured in software, hardware, or acombination of hardware and software, can be a separate module asillustrated in FIG. 3. Alternatively, the controller 310 can bedistributed among any one or more of the other modules illustrated inFIG. 3. The method 400 illustrated by FIG. 4 can be implemented in anysuch configuration of software and/or the hardware as discussed above.

Although specific embodiments and applications have been described inthis specification, these embodiments and applications are exemplaryonly, and many variations are possible. In addition to any previouslyindicated modification, numerous other variations and alternativearrangements may be devised by those skilled in the art withoutdeparting from the spirit and scope of this description, and appendedclaims are intended to cover such modifications and arrangements. Thus,while the information has been described above with particularity anddetail in connection with what is presently deemed to be the mostpractical and preferred aspects, it will be apparent to those ofordinary skill in the art that numerous modifications, including, butnot limited to, form, function, manner of operation and use may be madewithout departing from the principles and concepts set forth herein.Also, as used herein, examples are meant to be illustrative only andshould not be construed to be limiting in any manner.

We claim:
 1. A method of generating, in a communications transmitter, astream of symbol blocks, the method comprising: providing in a first ofthe symbol blocks a distinct symbol pattern identifying a start of aframe of the symbol blocks; providing in each of at least the first anda second of the symbol blocks a set of data symbols comprising a firstset of user bits modulated in accordance with a first modulation format;providing in each of at least the first and the second of the symbolblocks a set of support symbols comprising a second set of the user bitsmodulated in accordance with a second modulation format; and outputtingeach of at least the first and the second of the symbol blocks fortransmission to a remote receiver, wherein the first modulation formatis of a different modulation order than the second modulation format.